Interrupt.md (795B)
1 # Interrupt 2 3 **Source:** CS 6200 4 5 **Chapter:** P2L4 6 7 **Definition:** An interrupt is an event generated by an external component from the CPU (e.g. I/O devices, timers, other CPUs). These events are generated asynchronously. 8 9 Interrupts can be masked on the basis of a given CPU to suspend or disable the corresponding notification. This masking is done by a string of bits, one bit per interrupt. 10 11 ## Handling 12 13 When an interrupt is received by the CPU, the CPU looks up the correct handler for the given interrupt using the interrupt handler table, based on the interrupt number for of the device (this is often sent over PCIE to the CPU). The CPU then places the PC at the starting address of the handler associated with the current interrupt. This all happens within the same thread context.