DRAMRefresh.md (1301B)
1 # DRAM Refresh 2 3 This is the process of refreshing the energy stored in a [DRAMCell](DRAMCell.md)'s capacitor so that losses in energy over time do not cause loss of data (bitrot). 4 5 Currently, as of 2015, refreshes are required every 64ms. This costs electricity, can cause blocking issues, and as there is scaling these computations become slower and more power consuming. As an example, with 64gb DRAM refreshes can take up to 46% of time while 4gb is about 8% 6 7 There is little coordination between the OS and the memory controller and the memory controller can't store information about what memory is allocated. This means that instead of just refreshing allocated memory, all memory is refreshed at the given frequency. 8 9 This process is ran every 64ms and while most [DRAMCell](DRAMCell.md)'s can go much longer than 64ms the LCD is 64ms. This is a bar for manufacturing that causes bad RAM to be thrown away. The memory controller could probably be smarter about this, but this is not done. These thoughts about how to optimize these things are RAIDR which is Retention aware intelligent DRAM refresh particularly thing thinking about [[BloomFilter.md]] usage to track which cells need more frequent refreshes. This can reduce refreshes by 74.6% at the cost of 1.25kb of memory with 8gb chips.