DRAM.md (1112B)
1 # DRAM 2 3 DRAM is what we think of as RAM. See [Memory](Memory.md) for other links. 4 5 [DRAMBanks](DRAMBanks.md) are a 2d matrix of [[DRAMCell.md]] and it is accessed by rows. When the processor wants a row, it activates the row, sends it to the [[RowBuffer.md]], and then sends the data out. Subsequent accesses of a different column are very fast because the row is already in a buffer. This can be thought of cached rows. 6 7 One optimization done is to prioritize memory requests associated with memory that is already buffered to decrease context switching. This causes issues with multiple applications because it will prioritize applications that use localized memory more often. You can also create programs that take advantage of this to deny memory from other applications. On the flip side, if you are simply using an oldest request scheduling algorithm then random access requests will take more time and thus if one application uses more of them it will get more time than the other application. 8 9 [DRAMChips](DRAMChips.md) are the larger DRAM unit that includes both the Banks and associated circuitry.