cxx11_tensor_patch_sycl.cpp (9385B)
1 // This file is part of Eigen, a lightweight C++ template library 2 // for linear algebra. 3 // 4 // Copyright (C) 2016 5 // Mehdi Goli Codeplay Software Ltd. 6 // Ralph Potter Codeplay Software Ltd. 7 // Luke Iwanski Codeplay Software Ltd. 8 // Contact: <eigen@codeplay.com> 9 // Benoit Steiner <benoit.steiner.goog@gmail.com> 10 // 11 // This Source Code Form is subject to the terms of the Mozilla 12 // Public License v. 2.0. If a copy of the MPL was not distributed 13 // with this file, You can obtain one at http://mozilla.org/MPL/2.0/. 14 15 #define EIGEN_TEST_NO_LONGDOUBLE 16 #define EIGEN_TEST_NO_COMPLEX 17 18 #define EIGEN_DEFAULT_DENSE_INDEX_TYPE int64_t 19 #define EIGEN_USE_SYCL 20 21 #include "main.h" 22 23 #include <Eigen/CXX11/Tensor> 24 25 using Eigen::Tensor; 26 27 template <typename DataType, int DataLayout, typename IndexType> 28 static void test_simple_patch_sycl(const Eigen::SyclDevice& sycl_device){ 29 30 IndexType sizeDim1 = 2; 31 IndexType sizeDim2 = 3; 32 IndexType sizeDim3 = 5; 33 IndexType sizeDim4 = 7; 34 array<IndexType, 4> tensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4}}; 35 array<IndexType, 5> patchTensorRange; 36 if (DataLayout == ColMajor) { 37 patchTensorRange = {{1, 1, 1, 1, sizeDim1*sizeDim2*sizeDim3*sizeDim4}}; 38 }else{ 39 patchTensorRange = {{sizeDim1*sizeDim2*sizeDim3*sizeDim4,1, 1, 1, 1}}; 40 } 41 42 Tensor<DataType, 4, DataLayout,IndexType> tensor(tensorRange); 43 Tensor<DataType, 5, DataLayout,IndexType> no_patch(patchTensorRange); 44 45 tensor.setRandom(); 46 47 array<ptrdiff_t, 4> patch_dims; 48 patch_dims[0] = 1; 49 patch_dims[1] = 1; 50 patch_dims[2] = 1; 51 patch_dims[3] = 1; 52 53 const size_t tensorBuffSize =tensor.size()*sizeof(DataType); 54 size_t patchTensorBuffSize =no_patch.size()*sizeof(DataType); 55 DataType* gpu_data_tensor = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize)); 56 DataType* gpu_data_no_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize)); 57 58 TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_tensor(gpu_data_tensor, tensorRange); 59 TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_no_patch(gpu_data_no_patch, patchTensorRange); 60 61 sycl_device.memcpyHostToDevice(gpu_data_tensor, tensor.data(), tensorBuffSize); 62 gpu_no_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims); 63 sycl_device.memcpyDeviceToHost(no_patch.data(), gpu_data_no_patch, patchTensorBuffSize); 64 65 if (DataLayout == ColMajor) { 66 VERIFY_IS_EQUAL(no_patch.dimension(0), 1); 67 VERIFY_IS_EQUAL(no_patch.dimension(1), 1); 68 VERIFY_IS_EQUAL(no_patch.dimension(2), 1); 69 VERIFY_IS_EQUAL(no_patch.dimension(3), 1); 70 VERIFY_IS_EQUAL(no_patch.dimension(4), tensor.size()); 71 } else { 72 VERIFY_IS_EQUAL(no_patch.dimension(0), tensor.size()); 73 VERIFY_IS_EQUAL(no_patch.dimension(1), 1); 74 VERIFY_IS_EQUAL(no_patch.dimension(2), 1); 75 VERIFY_IS_EQUAL(no_patch.dimension(3), 1); 76 VERIFY_IS_EQUAL(no_patch.dimension(4), 1); 77 } 78 79 for (int i = 0; i < tensor.size(); ++i) { 80 VERIFY_IS_EQUAL(tensor.data()[i], no_patch.data()[i]); 81 } 82 83 patch_dims[0] = 2; 84 patch_dims[1] = 3; 85 patch_dims[2] = 5; 86 patch_dims[3] = 7; 87 88 if (DataLayout == ColMajor) { 89 patchTensorRange = {{sizeDim1,sizeDim2,sizeDim3,sizeDim4,1}}; 90 }else{ 91 patchTensorRange = {{1,sizeDim1,sizeDim2,sizeDim3,sizeDim4}}; 92 } 93 Tensor<DataType, 5, DataLayout,IndexType> single_patch(patchTensorRange); 94 patchTensorBuffSize =single_patch.size()*sizeof(DataType); 95 DataType* gpu_data_single_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize)); 96 TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_single_patch(gpu_data_single_patch, patchTensorRange); 97 98 gpu_single_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims); 99 sycl_device.memcpyDeviceToHost(single_patch.data(), gpu_data_single_patch, patchTensorBuffSize); 100 101 if (DataLayout == ColMajor) { 102 VERIFY_IS_EQUAL(single_patch.dimension(0), 2); 103 VERIFY_IS_EQUAL(single_patch.dimension(1), 3); 104 VERIFY_IS_EQUAL(single_patch.dimension(2), 5); 105 VERIFY_IS_EQUAL(single_patch.dimension(3), 7); 106 VERIFY_IS_EQUAL(single_patch.dimension(4), 1); 107 } else { 108 VERIFY_IS_EQUAL(single_patch.dimension(0), 1); 109 VERIFY_IS_EQUAL(single_patch.dimension(1), 2); 110 VERIFY_IS_EQUAL(single_patch.dimension(2), 3); 111 VERIFY_IS_EQUAL(single_patch.dimension(3), 5); 112 VERIFY_IS_EQUAL(single_patch.dimension(4), 7); 113 } 114 115 for (int i = 0; i < tensor.size(); ++i) { 116 VERIFY_IS_EQUAL(tensor.data()[i], single_patch.data()[i]); 117 } 118 patch_dims[0] = 1; 119 patch_dims[1] = 2; 120 patch_dims[2] = 2; 121 patch_dims[3] = 1; 122 123 if (DataLayout == ColMajor) { 124 patchTensorRange = {{1,2,2,1,2*2*4*7}}; 125 }else{ 126 patchTensorRange = {{2*2*4*7, 1, 2,2,1}}; 127 } 128 Tensor<DataType, 5, DataLayout,IndexType> twod_patch(patchTensorRange); 129 patchTensorBuffSize =twod_patch.size()*sizeof(DataType); 130 DataType* gpu_data_twod_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize)); 131 TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_twod_patch(gpu_data_twod_patch, patchTensorRange); 132 133 gpu_twod_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims); 134 sycl_device.memcpyDeviceToHost(twod_patch.data(), gpu_data_twod_patch, patchTensorBuffSize); 135 136 if (DataLayout == ColMajor) { 137 VERIFY_IS_EQUAL(twod_patch.dimension(0), 1); 138 VERIFY_IS_EQUAL(twod_patch.dimension(1), 2); 139 VERIFY_IS_EQUAL(twod_patch.dimension(2), 2); 140 VERIFY_IS_EQUAL(twod_patch.dimension(3), 1); 141 VERIFY_IS_EQUAL(twod_patch.dimension(4), 2*2*4*7); 142 } else { 143 VERIFY_IS_EQUAL(twod_patch.dimension(0), 2*2*4*7); 144 VERIFY_IS_EQUAL(twod_patch.dimension(1), 1); 145 VERIFY_IS_EQUAL(twod_patch.dimension(2), 2); 146 VERIFY_IS_EQUAL(twod_patch.dimension(3), 2); 147 VERIFY_IS_EQUAL(twod_patch.dimension(4), 1); 148 } 149 150 for (int i = 0; i < 2; ++i) { 151 for (int j = 0; j < 2; ++j) { 152 for (int k = 0; k < 4; ++k) { 153 for (int l = 0; l < 7; ++l) { 154 int patch_loc; 155 if (DataLayout == ColMajor) { 156 patch_loc = i + 2 * (j + 2 * (k + 4 * l)); 157 } else { 158 patch_loc = l + 7 * (k + 4 * (j + 2 * i)); 159 } 160 for (int x = 0; x < 2; ++x) { 161 for (int y = 0; y < 2; ++y) { 162 if (DataLayout == ColMajor) { 163 VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l), twod_patch(0,x,y,0,patch_loc)); 164 } else { 165 VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l), twod_patch(patch_loc,0,x,y,0)); 166 } 167 } 168 } 169 } 170 } 171 } 172 } 173 174 patch_dims[0] = 1; 175 patch_dims[1] = 2; 176 patch_dims[2] = 3; 177 patch_dims[3] = 5; 178 179 if (DataLayout == ColMajor) { 180 patchTensorRange = {{1,2,3,5,2*2*3*3}}; 181 }else{ 182 patchTensorRange = {{2*2*3*3, 1, 2,3,5}}; 183 } 184 Tensor<DataType, 5, DataLayout,IndexType> threed_patch(patchTensorRange); 185 patchTensorBuffSize =threed_patch.size()*sizeof(DataType); 186 DataType* gpu_data_threed_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize)); 187 TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_threed_patch(gpu_data_threed_patch, patchTensorRange); 188 189 gpu_threed_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims); 190 sycl_device.memcpyDeviceToHost(threed_patch.data(), gpu_data_threed_patch, patchTensorBuffSize); 191 192 if (DataLayout == ColMajor) { 193 VERIFY_IS_EQUAL(threed_patch.dimension(0), 1); 194 VERIFY_IS_EQUAL(threed_patch.dimension(1), 2); 195 VERIFY_IS_EQUAL(threed_patch.dimension(2), 3); 196 VERIFY_IS_EQUAL(threed_patch.dimension(3), 5); 197 VERIFY_IS_EQUAL(threed_patch.dimension(4), 2*2*3*3); 198 } else { 199 VERIFY_IS_EQUAL(threed_patch.dimension(0), 2*2*3*3); 200 VERIFY_IS_EQUAL(threed_patch.dimension(1), 1); 201 VERIFY_IS_EQUAL(threed_patch.dimension(2), 2); 202 VERIFY_IS_EQUAL(threed_patch.dimension(3), 3); 203 VERIFY_IS_EQUAL(threed_patch.dimension(4), 5); 204 } 205 206 for (int i = 0; i < 2; ++i) { 207 for (int j = 0; j < 2; ++j) { 208 for (int k = 0; k < 3; ++k) { 209 for (int l = 0; l < 3; ++l) { 210 int patch_loc; 211 if (DataLayout == ColMajor) { 212 patch_loc = i + 2 * (j + 2 * (k + 3 * l)); 213 } else { 214 patch_loc = l + 3 * (k + 3 * (j + 2 * i)); 215 } 216 for (int x = 0; x < 2; ++x) { 217 for (int y = 0; y < 3; ++y) { 218 for (int z = 0; z < 5; ++z) { 219 if (DataLayout == ColMajor) { 220 VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l+z), threed_patch(0,x,y,z,patch_loc)); 221 } else { 222 VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l+z), threed_patch(patch_loc,0,x,y,z)); 223 } 224 } 225 } 226 } 227 } 228 } 229 } 230 } 231 sycl_device.deallocate(gpu_data_tensor); 232 sycl_device.deallocate(gpu_data_no_patch); 233 sycl_device.deallocate(gpu_data_single_patch); 234 sycl_device.deallocate(gpu_data_twod_patch); 235 sycl_device.deallocate(gpu_data_threed_patch); 236 } 237 238 template<typename DataType, typename dev_Selector> void sycl_tensor_patch_test_per_device(dev_Selector s){ 239 QueueInterface queueInterface(s); 240 auto sycl_device = Eigen::SyclDevice(&queueInterface); 241 test_simple_patch_sycl<DataType, RowMajor, int64_t>(sycl_device); 242 test_simple_patch_sycl<DataType, ColMajor, int64_t>(sycl_device); 243 } 244 EIGEN_DECLARE_TEST(cxx11_tensor_patch_sycl) 245 { 246 for (const auto& device :Eigen::get_sycl_supported_devices()) { 247 CALL_SUBTEST(sycl_tensor_patch_test_per_device<float>(device)); 248 } 249 }